Verilog HDL高级数字设计-第二版-英文版

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作者：西勒提(Michael D.Ciletti)

出版社：电子工业出版社

本类榜单：计算机/网络

所属丛书：国外电子与通信教材系列

分类：计算机/网络 > 行业软件及应用

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ISBN：9787121104770
装帧：暂无
册数：暂无
重量：暂无
开本：16开
页数：965
出版时间：2010-04-01
条形码：9787121104770 ; 978-7-121-10477-0

本书特色

《Verilog HDL高级数字设计(第2版)(英文版)》特色·重点讨论现代数字电路系统的设计方法·阐述并推广基于Verilog 2001和2005，且可综合的RTL描述和算法建模的设计风格·明确指出了可综合和不可综合循环的区别·讲述了如何应用ASM和ASMD图进行行为级建模·深入讨论基于Verilog 2001和2005的数字处理系统、RISC计算机和各种数据通道控制器、异步和同步FIFO设计的算法和架构及综合的设计实例·给出了150多个经过完全验证的实例，对时序分析、故障模拟、测试和可测性设计进行切合实际的讨论·含有利用Vetilog 2001和2005编写的具备JTAG和BIST可测功能的实用设计案例·每章后均设计了一些涉及面广且难度高的习题·包含一套与《Verilog HDL高级数字设计(第2版)(英文版)》内容配套的可适合实验室实验验证的FPGA设计实例，如ALU、可编程电子锁、有FPFO的键盘扫描器、可纠错的串行通信接口、基于SRAM的控制器、异步和同步FIFO设计、存储器及RISC CPU《Verilog HDL高级数字设计(第2版)(英文版)》支持网站内容包括：所有模型的源文件、仿真实例的测试平台源文件、幻灯片文件、某些工具软件的速成教案及常见问题解答（FAQ）

内容简介

本书依据数字集成电路系统工程开发的要求与特点，利用verilog hdl对数字系统进行建模、设计与验证，对asic/fpga系统芯片工程设计开发的关键技术与流程进行了深入讲解，内容包括：集成电路芯片系统的建模、电路结构权衡、流水、多核微处理器、功能验证、时序分析、测试平台、故障模拟、可测性设计、逻辑综合、后综合验证等集成电路系统的前后端工程设计与实现中的关键技术及设计案例。书中以大量设计实例叙述了集成电路系统工程开发需遵循的原则、基本方法、实用技术、设计经验与技巧。
本书既可作为电子与通信、电子科学与技术、自动控制、计算机等专业领域的高年级本科生和研究生的教材或参考资格，也可用于电子系统设计及数字集成电路设计工程师的专业技术培训。

1 introduction to digital design methodology
1.1 design methodology—an introduction
1.2 ic technology options
1.3 overview
references
2 review of combinational logic design
2.1 combinational logic and boolean algebra
2.2 theorems for boolean algebraic minimization
2.3 representation of combinational logic
2.4 simplification of boolean expressions
2.5 glitches and hazards
2.6 building blocks for logic design
references
problems
3 fundamentals of sequential logic design
3.1 storage elements
3.2 flip-flops
3.3 busses and three-state devices
3.4 design of sequential machines
3.5 state-transition graphs
3.6 design example: bcd to excess-3 code converter
3.7 serial-line code converter for data transmission
3.8 state reduction and equivalent states
references
problems
4 introduction to logic design with verilog
4.1 structural models of combinational logic
4.2 logic system, design verification, and test methodology
4.3 propagation delay
4.4 truth table models of combinational and sequential logic with verilog
references
problems
5 logic design with behavioral models of combinational and sequential logic
5.1 behavioral modeling
5.2 a brief look at data types for behavioral modeling
5.3 boolean equation-based behavioral models of combinational logic
5.4 propagation delay and continuous assignments
5.5 latches and level-sensitive circuits in verilog
5.6 cyclic behavioral models of flip-flops and latches
5.7 cyclic behavior and edge detection
5.8 a comparison of styles for behavioral modeling
5.9 behavioral models of multiplexers, encoders, and decoders
5.10 dataflow models of a linear-feedback shift register
5.11 modeling digital machines with repetitive algorithms
5.12 machines with multicycle operations
5.13 design documentation with functions and tasks: legacy or lunacy?
5.14 algorithmic state machine charts for behavioral modeling
5.15 asmd charts
5.16 behavioral models of counters, shift registers, and register files
5.17 switch debounce, metastability, and synchronizers for asynchronous signals
5.18 design example: keypad scanner and encoder
references
problems
6 synthesis of combinational and sequential logic
7 design and synthesis of datapath controllers
8 programmable logic and storage devices
9 algorithms and architectures for digital processors
10 architectures for arithmetic processors
11 postsynthesis design tasks
a verilog primitives
b verilog keywords
c verilog data types
d verilog operators
e verilog language formal syntax
f verilog language formal syntax
g additional features of verilog
h flip-flop and latch types
i verilog-2001, 2005
j programming language interface
k web sites
l web-based resources
index

展开全部

节选

《Verilog HDL高级数字设计(第2版)(英文版)》依据数字集成电路系统工程开发的要求与特点，利用Verilog HDL对数字系统进行建模、设计与验证，对ASIC/FPGA系统芯片工程设计开发的关键技术与流程进行了深入讲解，内容包括：集成电路芯片系统的建模、电路结构权衡、流水、多核微处理器、功能验证、时序分析、测试平台、故障模拟、可测性设计、逻辑综合、后综合验证等集成电路系统的前后端工程设计与实现中的关键技术及设计案例。书中以大量设计实例叙述了集成电路系统工程开发需遵循的原则、基本方法、实用技术、设计经验与技巧。《Verilog HDL高级数字设计(第2版)(英文版)》既可作为电子与通信、电子科学与技术、自动控制、计算机等专业领域的高年级本科生和研究生的教材或参考资格，也可用于电子系统设计及数字集成电路设计工程师的专业技术培训。

相关资料

插图：HDL-based designs are easier to debug than schematics.A behavioral descrip-tion encapsulating complex functionality hides underlying gate-level detail，so there isless information to cope with in trying to isolate problems in the functionality of thedesign.Furthermore.if the behavioral description is functionally correct.it is a goldstandard for subsequent gate.1evel realizations.HDL-based designs incorporate documentation within the design by using de-scriptive names，by including comments to clarify intent，and by explicitly specifying ar-chitectural relationships.thereby reducing the volume of documentation that must bekept in other archives.Simulation of a language.based model explicitly specifies thefunctionality of the design.Since the language is a standard.documentation of a designcan be decoupled from a particular vendor's tools.Behavioral modeling is the predominant descriptive style used by industry，en-abling the design of massive chips.Behavioral modeling describes the functionality Dr adesign by specifying what the designed circuit will do.not how to build it in hardware.It specifies the input-output model of a logic circuit and suppresses details about phys-ical，gate-level implementation.Behavioral modeling encourages designers to（1）rapidly create a behavioral pro-totype of a design（without binding it to hardware details），（2）verify its functionality,and then （3） use a synthesis tool to optimize and map the design into a selected physi-cal technology.If the model has been written in a synthesis-ready style，the synthesistool will remove redundant logic.perform tradeoffs between alternative architecturesand／or multilevel equivalent circuits.and ultimately achieve a design that is compatiblewith area or timing constraints.By focusing the designer's attention on the functional-ity that is to be implemented rather than on individual logic gates and their i

作者简介

Michael D.Ciletti，科罗拉多大学电气与计算机工程系教授。研究方向包括通过硬件描述语言进行数字系统的建模、综合与验证、系统级设计语言和FPGA嵌入式系统。其著作还有Digital Design，Fourth Edition(其翻译版和影印版均由电子工业出版社出版)。作者曾在惠普、福特微电子和Prisma等公司进行VLSI电路设计的研发工作，在数字系统和嵌入式系统研究、设计等领域有丰富的研发和教学经历。

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