计算机组成与设计-硬件/软件接口-(英文版 第4版 ARM版)-(附光盘)
- ISBN:9787111302889
- 装帧:一般胶版纸
- 册数:暂无
- 重量:暂无
- 开本:16开
- 页数:689
- 出版时间:2010-04-01
- 条形码:9787111302889 ; 978-7-111-30288-9
本书特色
《计算机组成与设计:硬件/软件接口(英文版·第4版·ARM版)》为经典原版书库。
内容简介
这本*畅销的计算机组成书籍经过全面更新,关注现今发生在计算机体系结构领域的革命性变革:从单处理器发展到多核微处理器。此外,出版这本书的arm版是为了强调嵌入式系统对于全亚洲计算行业的重要性,并采用arm处理器来讨论实际计算机的指令集和算术运算,因为arm是用于嵌入式设备的*流行的指令集架构,而全世界每年约销售40亿个嵌入式设备。与前几版一样,本书采用了一个mips处理器来展示计算机硬件技术、流水线、存储器层次结构以及i/o等基本功能。此外,本书还包括一些关于x86架构的介绍。
本书主要特点
·采用armv6(arm11系列)为主要架构来展示指令系统和计算机算术运算的基本功能。
·覆盖从串行计算到并行计算的革命性变革,新增了关于并行化的一章,并且每章中还有一些强调并行硬件和软件主题的小节。
·新增一个由nvidia的首席科学家和架构主管撰写的附录,介绍了现代gpu的出现和重要性,首次详细描述了这个针对可视计算进行了优化的高度并行化、多线程、多核的处理器。
·描述一种度量多核性能的独特方法——“roofline model”,自带benchmark测试和分析amd opteron x4、intel xeon 5000、sun ultrasparc t2和 ibm cell的性能。
·涵盖了一些关于闪存和虚拟机的新内容。
·提供了大量富有启发性的练习题,内容达200多页。
·将amd opteron x4和intel nehalem作为贯穿本书的实例。
·用spec cpu2006组件更新了所有处理器性能实例。
目录
preface xv
chapters
computer abstractions and technology 2
1.1 introduction 3
1.2 below your program 10
1.3 under the covers 13
1.4 performance 26
1.5 the power wall 39
1.6 the sea change: the switch from uniprocessors to multiprocessors 41
1.7 real stuff: manufacturing and benchmarking the amd opteron x4 44
1.8 fallacies and pitfalls 51
1.9 concluding remarks 54
1.10 historical perspective and further reading 55
1.11 exercises 56
instructions: language of the computer 74
2.1 introduction 76
2.2 operations of the computer hardware 77
2.3 operands of the computer hardware 80
2.4 signed and unsigned numbers 86
2.5 representing instructions in the computer 93
2.6 logical operations 100
2.7 instructions for making decisions 104
2.8 supporting procedures in computer hardware 113
2.9 communicating with people 122
2.10 arm addressing for 32-bit immediates and more complex addressing modes 127
2.11 parallelism and instructions: synchronization 133
2.12 translating and starting a program 135
2.13 a c sort example to put it all together 143
: this icon identi.es material on the cd
2.14 arrays versus pointers 152
2.15 advanced material: compiling c and interpreting java 156
2.16 real stuff: mips instructions 156
2.17 real stuff: x86 instructions 161
2.18 fallacies and pitfalls 170
2.19 concluding remarks 171
2.20 historical perspective and further reading 174
2.21 exercises 174
arithmetic for computers 214
3.1 introduction 216
3.2 addition and subtraction 216
3.3 multiplication 220
3.4 division 226
3.5 floating point 232
3.6 parallelism and computer arithmetic: associativity 258
3.7 real stuff: floating point in the x86 259
3.8 fallacies and pitfalls 262
3.9 concluding remarks 265
3.10 historical perspective and further reading 268
3.11 exercises 269
the processor 284
4.1 introduction 286
4.2 logic design conventions 289
4.3 building a datapath 293
4.4 a simple implementation scheme 302
4.5 an overview of pipelining 316
4.6 pipelined datapath and control 330
4.7 data hazards: forwarding versus stalling 349
4.8 control hazards 361
4.9 exceptions 370
4.10 parallelism and advanced instruction-level parallelism 377
4.11 real stuff: the amd opteron x4 (barcelona) pipeline 390
4.12 advanced topic: an introduction to digital design using a hardware design language to describe and model a pipeline and more pipelining illustrations 392
4.13 fallacies and pitfalls 393
4.14 concluding remarks 394
4.15 historical perspective and further reading 395
4.16 exercises 395
large and fast: exploiting memory hierarchy 436
5.1 introduction 438
5.2 the basics of caches 443
5.3 measuring and improving cache performance 461
5.4 virtual memory 478
5.5 a common framework for memory hierarchies 504
5.6 virtual machines 511
5.7 using a finite-state machine to control a simple cache 515
5.8 parallelism and memory hierarchies: cache coherence 520
5.9 advanced material: implementing cache controllers 524
5.10 real stuff: the amd opteron x4 (barcelona) and intel nehalem memory hierarchies 525
5.11 fallacies and pitfalls 529
5.12 concluding remarks 533
5.13 historical perspective and further reading 534
5.14 exercises 534
storage and other i/o topics 554
6.1 introduction 556
6.2 dependability, reliability, and availability 559
6.3 disk storage 561
6.4 flash storage 566
6.5 connecting processors, memory, and i/o devices 568
6.6 interfacing i/o devices to the processor, memory, and operating system 572
6.7 i/o performance measures: examples from disk and file systems 582
6.8 designing an i/o system 584
6.9 parallelism and i/o: redundant arrays of inexpensive disks 585
6.10 real stuff: sun fire x4150 se
节选
《计算机组成与设计:硬件/软件接口(英文版·第4版·ARM版)》采用了一个MIPS处理器来展示计算机硬件技术、流水线、存储器层次结构以及I/O等基本功能。此外。《计算机组成与设计:硬件/软件接口(英文版·第4版·ARM版)》还包括一些关于x86架构的介绍。这本*畅销的计算机组成书籍经过全面更新,关注现今发生在计算机体系结构领域的革命性变革:从单处理器发展到多核微处理器。此外,出版这本书的ARM版是为了强调嵌入式系统对于全亚洲计算行业的重要性,并采用ARM处理器来讨论实际计算机的指令集和算术运算。因为ARM是用于嵌入式设备的*流行的指令集架构,而全世界每年约销售40亿个嵌入式设备。与前几版一样。采用ARMv6(ARM 11系列)为主要架构来展示指令系统和计算机算术运算的基本功能。覆盖从串行计算到并行计算的革命性变革,新增了关于并行化的一章,并且每章中还有一些强调并行硬件和软件主题的小节。新增一个由NVIDIA的首席科学家和架构主管撰写的附录,介绍了现代GPU的出现和重要性,首次详细描述了这个针对可视计算进行了优化的高度并行化、多线程、多核的处理器。描述一种度量多核性能的独特方法——“Roofline model”,自带benchmark测试和分析AMD Opteron X4、Intel Xeo 5000、Sun Ultra SPARC T2和IBM Cell的性能。涵盖了一些关于闪存和虚拟机的新内容。提供了大量富有启发性的练习题,内容达200多页。将AMD Opteron X4和Intel Nehalem作为贯穿《计算机组成与设计:硬件/软件接口(英文版·第4版·ARM版)》的实例。用SPEC CPU2006组件更新了所有处理器性能实例。
相关资料
插图:Diameters of hard disks vary by more than a factor of 3 today, from 1 inch to 35 inches, and have been shrunk over the years to fit into new products; workstation servers, personal computers, laptops, palmtops, and digital cameras have all inspired new disk form factors Traditionally, the widest disks have the highest performance and the smallest disks have the lowest unit cost The best cost per gigabyte varies Although most hard drives appear inside computers, as in Figure 17, hard drives can also be attached using external interfaces such as universal serial bus(USB).The use of mechanical components means that access times for magnetic disks are much slower than for DRAMs: disks typically take 5-20 milliseconds, while DRAMs take 50-70 nanoseconds——making DRAMs about 100,000 times faster Yet disks have much lower costs than DRAM for the same storage capacity, because the production costs for a given amount of disk storage are lower than for the same amount of integrated circuit In 2008, the cost per gigabyte of disk is 30 to 100 times less expensive than DRAM.Thus, there are three primary differences between magnetic disks and main memory: disks are nonvolatile because they are magnetic; they have a slower access time because they are mechanical devices; and they are cheaper per gigabyte because they have very high storage capacity at a modest cost.Many have tried to invent a technology cheaper than DRAM but faster than disk to fill that gap, but many have failed Challengers have never had a product to market at the right time By the time a new product would ship, DRAMs and disks had continued to make rapid advances, costs had dropped accordingly, and the challenging product was immediately obsoleteFlash memory, however, is a serious challenger This semiconductor memory is nonvolatile like disks and has about the same bandwidth, but latency is 100 to 1000 times faster
作者简介
David A.Patterson,加州大学伯克利分校计算机科学系教授。美国国家工程研究院院士。IEEE和ACM会士。曾因成功的启发式教育方法被IEEE授予James H.Mulligan,Jr教育奖章。他因为对RISC技术的贡献而荣获1 995年IEEE技术成就奖,而在RAID技术方面的成就为他赢得了1999年IEEE Reynold Johnson信息存储奖。2000年他~13John L.Hennessy分享了John von Neumann奖。
John L.Hennessy,斯坦福大学校长,IEEE和ACM会士。美国国家工程研究院院士及美国科学艺术研究院院士。Hennessy教授因为在RISC技术方面做出了突出贡献而荣获2001年的Eckert-Mauchly奖章.他也是2001年Seymour Cray计算机工程奖得主。并且和David A.Patterson分享了2000年John von Neumann奖。
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