逻辑与计算机设计基础-(英文版.第4版)

preface
chapter 1
digital systems and information
1-1 information representation
the digital computer
beyond the computer
more on the generic computer
1-2 number systems
binary numbers
octal and hexadecimal numbers
number ranges
1-3 arithmetic operations
conversion from decimal to other bases
1-4 decimal codes
bcd addition
1-5 alphanumeric codes
ascii character code
parity bit
1-6 gray codes
1-7 chapter summary
references
problems
chapter 2
combinational logic circuits
2-1 binary logic and gates
binary logic
logic gates
2-2 boolean algebra
basic identities of boolean algebra
algebraic manipulation
complement of a function
2-3 standard forms
minterms and maxterms
sum of products
product of sums
2-4 two-level circuit optimization
cost criteria
map structures
two-variable maps
three-variable maps
2-5 map manipulation
essential prime implicants
nonessential prime implicants
product-of-sums optimization
don't-care conditions
2-6 pragmatic two-level optimization
2-7 multiple-level circuit optimization
2-8 other gate types
2-9 exclusive-or operator and gates
odd function
2-10 high-impedance outputs
2-11 chapter summary
references
problems
chapter 3
combinational logic design
3-1 design procedure
3-2 beginning hierarchical design
3-3 technology mapping
3-4 verification
manual logic analysis
simulation
3-5 combinational functional blocks
3-6 rudimentary logic functions
value-fixing, transferring, and inverting
multiple-bit functions
enabling
3-7 decoding
decoder and enabling combinations
decoder-based combinational circuits
3-8 encoding
priority encoder
encoder expansion
3-9 selecting
multiplexers
multiplexer-based combinational circuits
3-10 chapter summary
references
problems
chapter 4
arithmetic functions and i'-ides
4-1 iterative combinational circuits
4-2 binary adders
half adder
full adder
binary ripple carry adder
4-3 binary subtraction
complements
subtraction using 2s complement
44 binary adder-subtractors
signed binary numbers
signed binary addition and subtraction
overflow
4-5 other arithmetic functions
contraction
incrementing
decrementing
multiplication by constants
division by constants
zero fill and extension
4-6 hardware description languages
hardware description languages
logic synthesis
4-7 hdl representations-vhdl
behavioral description
4-8 hdl representations-verilog
behavioral description
4-9 chapter summary
references
problems
chapter 5
sequential circuits
5-1 sequential circuit definitions
5-2 latches
sr and s r latches
d latch
5-3 flip-flops
master-slave flip-flops
edge-triggered flip-flop
standard graphics symbols
direct inputs
5-4 sequential circuit analysis
input equations
state table
state diagram
sequential circuit simulation
54 sequential circuit design
design procedure
finding state diagrams and state tables
state assitmment
designing with d flip-flops
designing with unused states
verification
5-6 other flip-flop types
jk and t flip-flops
5-7 state-machine diagrams and applications
state-machine diagram model
constraints on input conditions
design applications using state-machine diagrams
5-8 hdl representafon for sequential circuits-vhdl
5-9 hdl representation for sequential circuits-verilog
5-10 chapter summary
references
problems
chapter 6
selected design topics
6-1 the design space
integrated circuits
cmos circuit technology
technology parameters
6-2 gate propagation delay
6-3 flip-flop timing
6-4 sequential circuit timing
6-5 asynchronous interactions
6-6 synchronization and metastability
6-7 synchronous circuit pitfalls
6-8 programmable implementation technologies
read-only memory
programmable logic array
programmable array logic devices
6-9 chapter summary
references
problems
chapter 7
registers and register transfers
7-1 registers and load enable
register with parallel load
7-2 register transfers
7-3 register transfer operations
7-4 a note for vhdl and verilog users only
7-5 microoperations
arithmetic microoperations
logic microoperations
shift microoperations
7-6 microoperations on a single register
multiplexer-based transfers
shift registers
ripple counter
synchronous binary counters
other counters
7-7 register-cell design
7-8 multiplexer and bus-based transfers
for multiple registers
three-state bus
7-9 serial transfer and microoperations
serial addition
7-10 control of register transfers
design procedure
7-11 hdl representation for shift registers
and counters-vhdl
7-12 hdl representation for shift registers
and counters-verilog
7-13 microprogrammed control
7-14 chapter summary
references
problems
chapter 8
memory basics
8-1 memory definitions
8-2 random-access memory
write and read operations
timing waveforms
properties of memory
8-3 sram integrated circuits
coincident selection
8-4 array of sram ics
8-5 dram ics
dram cell
dram bit slice
8-6 dram types
synchronous dram (sdram)
double-data-rate sdram (ddr sdram)
rambus dram (rdram)
8-7 arrays of dynamic ram ics
8-8 chapter summary
references
problems
chapter 9
computer design basics
9-1 introduction
9-2 datapaths
9-3 the arithmetic/logic unit
arithmetic circuit
logic circuit
arithmetic/logic unit
9-4 the shifter
barrel shifter
9-5 datapath representation
9-6 the control word
9-7 a simple computer architecture
instruction set architecture
storage resources
instruction formats
instruction specifications
9-8 single-cycle hardwired control
instruction decoder
sample instructions and program
single-cycle computer issues
9-9 multiple-cycle hardwired control
sequential control design
9-10 chapter summary
references
problems
chapter 10
instruction set architecture
10-1 computer architecture concepts
basic computer operation cycle
register set
10-2 operand addressing
three-address instructions
two-address instructions
one-address instructions
zero-address instructions
addressing architectures
10-3 addressing modes
implied mode
immediate mode
register and register-indirect modes
direct addressing mode
indirect addressing mode
relative addressing mode
indexed addressing mode
summary of addressing modes
10-4 instruction set architectures
10-5 data-transfer instructions
stack instructions
independent versus memory-mapped i/o
10-6 data-manipulation instructions
arithmetic instructions
logical and bit-manipulation instructions
shift instructions
10-7 floating-point computations
arithmetic operations
biased exponent
standard operand format
10-8 program control instructions
conditional branch instructions
procedure call and return instructions
10-9 program interrupt
types of interrupts
processing external interrupts
10-10 chapter summary
references
problems
chapter 11
risc and cisc central processing units
11-1 pipelined datapath
execution of pipeline microoperations
11-2 pipelined control
pipeline programming and performance
11-3 the reduced instruction set computer
instruction set architecture
addressing modes
datapath organization
control organization
data hazards
control hazards
11-4 the complex instruction set computer
isa modifications
datapath modifications
control unit modifications
microprogrammed control
microprograms for complex instructions
11-5 more on design
advanced cpu concepts
recent architectural innovations
11-6 chapter summary
references
problems
chapter 12
input-output and communication
12-1 computer uo
12-2 sample peripherals
keyboard
hard drive
liquid crystal display screen
i/o transfer rates
12-3 i/o interfaces
i/o bus and interface unit
example of i/o interface
strobing
handshaking
12-4 serial communication
synchronous transmission
the keyboard revisited
a packet-based serial i/o bus
12-5 modes of transfer
example of program-controlled transfer
interrupt-initiated transfer
12-6 priority interrupt
daisy chain priority
parallel priority hardware
12-7 direct memory access
dma controller
dma transfer
12-8 chapter summary
references
problems
chapter 13
memory systems
13-1 memory hierarchy
13-2 locality of reference
13-3 cache memory
cache mappings
line size
cache loading
write methods
integration of concepts
instruction and data caches
multiple-level caches
13-4 virtual memory
page tables
translation lookaside buffer
virtual memory and cache
13-5 chapter summary
references
problems
index